Semiconductor devices are used in a variety of electronic applications, such as computers, cellular phones, personal computing devices, and many other applications. Home, industrial, and automotive devices that in the past comprised only mechanical components now have electronic parts that require semiconductor devices, for example.
Semiconductor devices typically include several layers of insulating, conductive and semiconductive materials that are patterned to form integrated circuits (ICs). There may be a plurality of transistors, memory devices, switches, conductive lines, diodes, capacitors, logic circuits, and other electronic components formed on a single die or chip. Semiconductor technology has experienced a trend towards miniaturization, in order to meet the demands of product size reduction, improved device performance, and reduced power requirements in the end applications that semiconductors are used in, for example.
In the past, integrated circuits contained only a relatively small number of devices per chip, and the devices could be easily interconnected. However, in more recent integrated circuit designs, there may be millions of devices on a single chip, resulting in the need for multilevel interconnect systems, wherein the area for interconnect lines is shared among two or more material levels.
The manufacturing process for semiconductor devices is typically referred to in two phases: the front-end-of-line (FEOL) and the back-end-of-line (BEOL). The FEOL is defined as the process steps that begin with a starting wafer up to the formation of the first metallization layer, and the BEOL is defined as all process steps from that point forward. The interconnect lines of an integrated circuit are usually formed in the BEOL.
As the minimum line width on an integrated circuit becomes smaller, the active device density increases, and transistor switching speed decreases, while signal propagation delays in the interconnect system become limiting on the performance of the integrated circuit. Also, as the chip size increases, the interconnect path lengths also increase. Thus, many large ultra-large scale integration (ULSI) integrated circuits are limited by interconnect propagation delay time.
The propagation delay of integrated circuits becomes limited by the RC delay of the interconnection lines when the minimum feature size is decreased below about 0.25 μm for example, which limits the circuit speeds. The RC delay refers to the resistance of the conductive lines used for the interconnect and the capacitance between the conductive lines.
One challenge in the semiconductor industry is to reduce and minimize the RC delay of integrated circuits, in order to improve device performance and increase device speed. The resistive or R component of RC delay is being addressed by the move from the use of aluminum to copper, which has a lower resistance than aluminum, as the material of conductive lines. The C or capacitive component of RC delay is being addressed by attempts to use insulating materials between the conductive lines that comprise a lower dielectric constant (k) than materials such as SiO2 that were used in the past for inter-metal dielectric (IMD) materials.
What are needed in the art are improved methods of lowering the capacitive component C of the RC delay in integrated circuits.